The silicon electro-optic modulator is a key component in the conversion of electrical signals into optical signals for use in CMOS (complementary metal-oxide-semiconductor) electro-photonic integrated circuits. Standard silicon electro-optic modulators employ reverse biased P-N diodes to achieve a large modulation bandwidth of up to 20 GHz. However, in order to use silicon electro-optic modulators in CMOS compatible electro-photonic circuits, there is a trade-off between bandwidth and other performance factors. Specifically, on-chip CMOS modulator drivers integrated with silicon electro-optic modulators normally have a bandwidth lower than 10 GHz. Thus, because the bandwidth of a silicon electro-optic modulator is limited to the bandwidth of the driver, the modulator itself has the flexibility to trade off some of its larger bandwidth capacity for improvements in other operating parameters.
One such operating parameter is the insertion loss. The tight optical link power budget demands strict control of the insertion loss of every component along an optical link. Thus, it is desirable to reduce the insertion loss of a silicon electro-optic modulator while maintaining its bandwidth at 10 GHz. One source of insertion loss is the scattering loss of the silicon waveguide employed by a silicon electro-optic modulator. Normally, the lateral size of a waveguide used in a silicon electro-optic modulator is around several hundred nanometers and supports only one optical mode (i.e., a single mode waveguide). The typical scattering loss from such a small waveguide is around 2-4 dB/cm. A phase shift region of a modulator is generally about 3-4 mm in length; thus, scattering losses are in the range of 0.6-1.2 dB.
Scattering loss and optical propagation loss can be reduced by using a low scattering loss multimode waveguide, which has a wider rib than a single mode waveguide. However, since the optical mode profile in a multimode waveguide is laterally extended, there is little overlap between the optical mode profile in the waveguide and the depletion region of a lateral PN junction in the waveguide (i.e., the junction between two laterally adjacent and oppositely doped materials), resulting in a degraded modulation efficiency. Thus, a vertical P-N junction (i.e., a junction between two oppositely doped materials stacked one on top of the other) is preferred in order to increase the overlap between the optical mode profile in the waveguide and the depletion region in the P-N junction. A conductive epi-silicon layer is often used for electrical connection to the top region of the vertical P-N junction. However, this arrangement is challenging to fabricate and generates additional loss due to the proximity of the highly doped epi-silicon layer to the optical mode in the waveguide.